The present invention relates to integrated circuit devices and, more particularly, to image sensor integrated circuit devices and methods of forming the same.
Digital image capture functionality is now provided in a variety of different devices, including a wide range of digital cameras, cellular phones and the like. Such digital image capturing devices typically include an image sensor array capturing image data by “pixel,” with the resolution of the image sensor being defined by its number of pixels. A captured image from the image sensor array is generally represented by digital data, which may be displayed, transmitted to another device, subject to image processing, such as image recognition and the like. Two commonly used technologies for an image sensor include a charge coupled device (CCD) and a CMOS image sensor (CIS).
A typical CCD 10 is illustrated in the block diagram of FIG. 1. As illustrated in FIG. 1, the CCD 10 includes a plurality of photodetectors 11. Each vertical column 13 of photodetectors 11 is coupled to a vertical CCD shift register 15. The vertical CCD shift registers 15 are coupled to a horizontal CCD shift register 17. The horizontal CCD shift register 17 is coupled to an amplifier 19 that outputs an amplified image signal. CCD type sensors are typically used in a variety of applications, including high quality digital cameras, as they generally provide a high quality image signal with low noise and high uniformity as there is generally no amplification of the sensed signal provided at the individual photodetector (pixel) 11 level. However, CCD sensors are generally difficult to integrate with other camera functions on a single integrated circuit device (chip). They also generally have high power consumption and a slow frame read rate.
A typical CIS configuration is illustrated in the block diagram of FIG. 2. As illustrated in FIG. 2, the CIS 20 includes a sensor array 21 including a plurality of photodetector circuits (active pixels) 23. Each photodetector circuit 23 includes a photodetector and its associated access circuitry as will be described with reference to FIG. 3. The photodetector circuits 23 are arranged in an array of cells, with a cell being selected for reading by the row decoder 25 and the column decoder 26. The photodetector circuits 23 are read with amplification by the column amplifiers 27 and further amplification by the output amplifier 29. A photodetector signal, therefore, may be subjected to amplification by the photodetector circuit 23 and further amplified by the column amplifiers 27 and the output amplifier 29. These multiple levels of amplification may result in high noise and greater non-uniformity than a CCD device. However, a CIS is generally easier to integrate with other camera functions on a single integrated circuit device, generally operates with lower power consumption and may provide a higher frame rate.
FIG. 3 is a circuit diagram illustrating a conventional configuration for a CIS photodetector circuit 30. As shown in FIG. 3, a photoelectric conversion element 31 captures incident light and converts the incident light to a stored charge. A transfer transistor 31A passes the stored charge from the photoelectric conversion element 31 to a floating diffusion region 32. A reset transistor 33 resets charge accumulated in the floating diffusion region 32 to a reference level. Amplification at the pixel level is provided by a drive transistor 34, which is illustrated as a source follower amplifier that buffers a voltage output VOUT to an output line (Out) 35. A select transistor 36 selectively couples a selected photodetector circuit 30 to the output line 35. As shown in the illustration of FIG. 3, drains of the reset transistor 33 and the driver transistor 34 are connected to a source voltage VDD. The gate of the select transistor 36 is connected to a control signal (Row SEL) 37. The source of the select transistor 36 is connected to the output line 35. The gates of the transfer transistor 31A and the reset transistor 33 are connected to respective control signal lines Tx 38 and Rx 39. The relationship between the control signal lines Row SEL 37, Rx 39, Tx 38 and the output line 35 of FIG. 3 for a plurality of photodetector circuits 30 arranged in an active pixel sensor array 40 are illustrated in FIG. 4.
FIG. 5 is a cross-sectional view illustrating a portion of an integrated circuit photodetector circuit 50 for a photoelectric conversion element 51. As shown in FIG. 5, a photoelectric conversion element 51 is provided in a semiconductor substrate 53. It will be understood that FIG. 5 merely provides a simplified depiction of the photoelectric conversion element 51 for purposes of illustration of operation thereof. A plurality of interlayer dielectric layers 55, 55′, 55″ and metal layers M1, M2, M3 are also shown in FIG. 5.
Also shown in FIG. 5 are a variety of incident light rays, R1, R2, R3 passing through a light transmissive region 59 associated with the photoelectric conversion element 51 that is defined by an opening aperture A1 and extends through the interlayer dielectric layers 55, 55′, 55″ to allow incident light to be received by the photoelectric conversion element 51. Generally, to provide a best resolution image, it is desirable with a sensor array, such as an active pixel sensor array, that light passing through an aperture A1 be incident only on the corresponding associated photoelectric conversion element 51. However, as illustrated by the various rays R1, R2, R3 in FIG. 5, degradation may be caused by various incident light rays passing through the aperture A1 and striking adjacent photoelectric conversion elements. Refracted rays R1 may be generated as a result of the respective interlayer dielectric layers 55, 55′, 55″ having different indices of refraction. The reflected rays R2 may be generated by reflection from the upper surface and/or side surface of a metal layer M1, M2, M3. Finally, defracted rays R3 may be generated because of the displacement distance between the top metal layer M3, including the aperture A1, and the photoelectric conversion element 51 having a greater length than the wavelength of an incident light ray. The refracted, reflected and/or defracted rays R1, R2, R3 may shine on neighboring photoelectric conversion elements that are not intended to receive this incident light, which may induce cross talk with an adjacent pixel photoelectric conversion element.